Hardware::Vhdl::Tidy Hardware::Vhdl::Tidy is a VHDL code prettifier.
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Hardware::Vhdl::Tidy Tags

Perl module code tidy code prettifier Vhdl tidy Vhdl

Hardware::Vhdl::Tidy Description

Hardware::Vhdl::Tidy is a VHDL code prettifier. Hardware::Vhdl::Tidy is a VHDL code prettifier.SYNOPSISCommand-line call to make a tidied version of a VHDL file: perl -MHardware::Vhdl::Tidy -e "Hardware::Vhdl::Tidy::parse_commandline" < messy.vhd > tidied.vhd # or: perl -MHardware::Vhdl::Tidy -e "Hardware::Vhdl::Tidy::parse_commandline" messy.vhd > tidied.vhdCommand-line call for an in-place tidy of one or more VHDL files: perl -MHardware::Vhdl::Tidy -e "Hardware::Vhdl::Tidy::parse_commandline" -- -b To tidy a VHDL file from a perl script: use Hardware::Vhdl::Tidy qw/ tidy_vhdl_file /; tidy_vhdl_file( { source => $infile, destination => $outfile, # the following args are optional, and the values shown are the defaults: indent_spaces => 4, # integer value, >= 0 cont_spaces => 2, # integer value, >= 0 tab_spaces => 0, # integer value, >= 0 starting_indentation => 0, # integer value, >= 0 preprocessor_prefix => '#', # string indent_preprocessor => 0, # boolean } );To tidy some stored VHDL code in a perl script: use Hardware::Vhdl::Tidy qw/ tidy_vhdl /; tidy_vhdl( { source => $souce_thing, # a scalar, array ref, filehandle ref, object... destination => $dest_thing, # a scalar, array ref, filehandle ref, object... # options can be set here, as for tidy_vhdl_file } ); Requirements: · Perl

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